1. Field of the Invention
The invention relates to a material for planarizing an uneven or up-and-down surface of a substrate, such as those used for making wiring boards and electronic devices, and a method for planarizing a surface of a substrate using the material of the invention. The invention can planarize a substrate surface carrying wirings having a width as wide as several hundred micrometers, and is particularly useful in forming multi-layered wirings having less than half micrometer rule wiring patters. The invention also relates to a substrate having a surface planarized by the material and method of the invention.
2. Description of the Related Art
In recent years, as the degree of integration in semiconductor integrated circuits has increased and the density of semiconductor device elements has increased, the demand has increased for the multi-layering of semiconductor device wirings. Also, thicker wirings are needed to prevent reduction in wiring capacity due to minute wirings, which leads to a tendency to increase in a level difference between an upper and lower surfaces of a film or layer formed so as to cover the and a support on which the wiring are located, the upper surface corresponding to the surface of the film or layer present on the wiring, and the lower surface corresponding to the surface of the film or layer present on the area of the support in which the wirings are absent. Thus, in order to form minute wirings, particularly multi-layered wirings, it is required to form an interlayer insulating film providing excellent planarizability which can extend a focus margin of a resist.
For such a requirement, planarization of a substrate has been carried out by applying a spin-on-glass (SOG) on the substrate by a spin coating to thereby fill in spaces between adjacent ridges. In this technique, a width of wiring capable of being planarized is limited to at most nearly 5 micrometers, which is in the range of the width of a local eminence, even in relatively good cases, and it is impossible to planarize a substrate surface having wider wirings.
On the other hand, for a method of planarizing topographic substrate having a width of several score micrometers or more wiring patterns, which is in the range of width of a global eminence, chemical-mechanical polishing (CMP), in which mechanical polishing is performed while using an etching solution, has been studied. However, this method may damage wiring, and has the inconveniences of, for example, low throughput, because the CMP requires an alkaline solution, such as a KOH solution, as the etching solution, and a low polishing rate to provide sufficient flat properties for wide wirings.
In contrast, a technique is used in which a planarizing material which reflows on heating is applied on an insulating film thickly formed on wirings by a process such as a chemical vapor deposition (CVD), to thereby form a planarized film, and thereafter, the planarized film and portions of the underlying insulating film are removed by an etchback process, to thereby planarize the insulating film. In this technique, wiring patterns having a width of at most several score of micrometers can be only planarized, because the reflowability of the planarizing material is insufficient.
As used herein, the term "eminence" means a projection or convexity present on a surface of a substrate, regardless of its sizes such as height, width, length, and diameter, which is responsible for unevenness of the surface of the substrate. Further as used herein, "local eminence" means an eminence at a surface of substrate, which results from formation of an uneven or up-and-down pattern on a support, such as a wiring pattern, having a width as narrow as of at most about 10 micrometers. Also as used herein, "global eminence" means an eminence at a surface of substrate, which results from formation of an uneven or up-and-down pattern on a support, such as a wiring pattern, having a width reaching several hundred micrometers or more. As used herein, "support" means a support or base on which an uneven or up-and-down pattern or layer is formed by conventional processes such as those used in the electronic industries, including resist pattern formation and subsequent etching. The term "substrate" is used to mean a substrate including the support and an uneven or up-and-down pattern or layer formed thereon and having eminences at its surface resulting from the formation of the pattern or layer. As described hereinafter, the present invention is applied to such a substrate. It should be noted that the term "substrate" is to be understood to include substrates having any uneven or rough surface, which exhibits a much smaller eminence than the eminence developed by the formation of wiring pattern. Thus, the "substrate" in the invention may include substrates having an unpolished surface, such as those made of a crystal. It should be also noted that the "substrate" also means a substrate comprising a support having eminences such as those resulting from formation of an uneven pattern and a film or layer made of a planarizing material or another material such as an insulating material.
Various siloxane polymers having silphenylene bonds in their molecules, such as the polymer used in the present invention, are known. For example, U.S. Pat. Nos. 2,445,794, 4,778,871, and 5,035,927 describe siloxane polymers containing silphenylene bonds in their skeleton. Further, Japanese Examined Patent Publication No. 6-36099 (JP B 6-36099) (which corresponds to U.S. Pat. Nos. 5,240,813 and 5,484,687) discloses a polysilphenylene siloxane which is useful for a resist material. In addition, the following references also describe siloxane polymers having silphenylene bonds in their molecules: Y. Lai, P. R. Dvornic and R. W. Lenz, Journal of Polymer Science, Polymer Chemistry Edition, Vol. 20, 2277-2288 (1982); Y. Nagase, K. Ikeda, and Y. Sekine, Chem. Abs., 98 (16), 126994, Polymer, 23(11), 1646-52 (1982); M. Livingston, P. R. Dvornic and R. W. Lenz, Journal of Appl. Poly. Sci., 27, 3238-3251 (1982); and Noll, Chemistry and Technology of Silicones, pp. 139-140. However, no silphenylene siloxane polymer was hitherto known which allows to planarize a surface of a substrate on which the polymer is applied.